Parallella Community

Hi,

I was having a look at how to port some applications I had in mind to the paralella board and run the bulk of the processing inside the cores. If I want to keep the working data set in the 32k, that means I get something like:

Bank0 - Code
Bank1 - IQ Data buffer 0
Bank2 - IQ Data buffer 1
Bank4 - Temp data / stack / heap

So only 8k of code ... and when I tried to compile my lightweight DSP library, it already pretty much takes those 8k (despite being just the framework and none of the actual 'work' yet).

So I was wondering what kind of impact running from global memory ? Does paralella have anything like automatic cache or prefectch ?

Cheers,

Sylvain

@tnt,

Access to DRAM has its impact indeed. The exact numbers, however, depend greatly on the FPGA implementation. On our prototype platform the implementation is still sub-optimal but will be enhanced during the coming weeks.

Given this, on DMA transfer tests that we performed we saw that reading data from external memory was ~6x slower than reading from neighboring core's SRAM, which by itself is ~10x slower than reading from a core's own SRAM.

Now, these tests were performed using DMA transfers. The performance for LDR instructions will be much slower, due to the read protocol (each read transaction stalls the core's pipeline until the data returns - contrary to DMA transactions that are fired as soon as the node is clear). Unfortunately, I cannot quote the numbers at the moment.

The Epiphany does not have built in cache or prefetch mechanism, but it may be possible to perform code prefetch using DMA in some smart overlay fashion.

Great analysis. Thanks.