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Parallella Community • View topic - instruction set decoding

instruction set decoding

Any technical questions about the Epiphany chip and Parallella HW Platform.

Moderator: aolofsson

instruction set decoding

Postby Gravis » Wed Jul 03, 2013 1:09 pm

at the end of the it lists the "Epiphany Instruction Decode Table" which is rather complex because of it's format. instead of normal opcodes, there are many different formats to consider. i'm working on an emulator of the Epiphany chip and i to keep the code clear and concise. so, what is the optimal method of determining the instruction?
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Re: instruction set decoding

Postby Hoernchen » Wed Jul 03, 2013 3:00 pm

Re-ordering that table and grouping by bits 3:0 and then using a lookup table for those bits to narrow it down, then checking the other bits is the first thing that comes to mind.
Or adding the instruction encoding to llvm and abusing tablegen/disassembler backend...

(I'd also like to have that table as an actual table)
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Re: instruction set decoding

Postby Gravis » Thu Jul 04, 2013 2:19 pm

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Re: instruction set decoding

Postby Gravis » Fri Jul 05, 2013 2:19 pm

i switched my code to use just a series of switch tables (none embedded) taking the instruction and masking it in different ways for each table to always hit an exact value which creates smaller code than ranges. very straight forward and faster than before. :)
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Re: instruction set decoding

Postby Gravis » Tue Jul 09, 2013 3:59 pm

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