eLink protocol

[Gravis]

i'm just curious about the eLink protocol. i know there is HDL code for interfacing but i'm no good with HDL, so is there a PDF somewhere with detailed info about it?

[aolofsson]

gravis,

We really should document it better, but sometimes it seems like it's a shame when we have already taken the step of open sourcing the implementation code. Any chance you could use the following tool to translate verilog to C++/systemC as a start? This is the open source tool we used for the majority of our design verification work.

http://www.veripool.org/wiki/verilator

We'll get to the documentation, I just can't see when..

Andreas

[Gravis]

i'm not in any particular rush. i was simply looking into the minimal amount of tweaks that would be needed for a translating FPGA so that i could put an Epiphany chip on a PCIe board.