movidius ,how does it compare to epiphany?

[dobkeratops]

http://uploads.movidius.com/1441734401- ... -brief.pdf

this looks pretty interesting, how does it compare & contrast with the epiphany architecture?

How mane e-cores would be roughly equivalent? ( 64? - 12 x 4=48 32bit operations in parallel maybe; '2mb on chip memory'= 64*32k... however I'd suspect the epiphany needs more of that for code, maybe they have 128k per core + L2 + ?)

It seems like its aimed very squarely at vision processing, but could the Zynq FPGA+epiphany setup match it? (e.g. doing 16bit colour transformation in the zynq) - I guess the connection between the two might be problematic, unless you could get more of the e-links involved

Claims to have '12 cores';
This seems to rely on wide SIMD units within its cores 128bits.. 8x16 or 4x32 i guess, reminiscent of CELL, but maybe they've got better scatter/gather ability (thats where GPGPU had advantages over CELL), and they seem to have a shared L2 which could help that.

I would still guess the epiphany's network-on-a-chip would be superior for NN's (handling dataflow between layers), and be more scalable, they describe a 'bus' connecting the cores, (maybe it's a ringbus like CELL was..)

What does their 'intelligent memory fabric' do.

Does it support any programming models that could move over.


Maybe they map better to OpenCL, (but I still think you could treat 2x2 groups of e-cores as a 'workgroup'.. with a fraction of each being 'local')

The presence of 16bit precision is useful ... what are the tradeoffs giving something both 16 and 32bit support, is it possible to make hardware multipliers that support both?

Seems like the epiphany architecture would also be inherently more scalable i.e. for actually training nets in servers..

[aolofsson]

They have been around for a long team and have a strong team but it's impossible to make any kind of comparison without a reference manual and open tool chain.