Hi,
I was measuring performance of Parallella board in terms of TCP throughput and got results of ~600Mbps under best conditions (128K blocks, single stream). But according to Xilinx XAPP1082 reference design it is possible to gain up to 900Mbps.
What kind of optimizations do you think I can make to Linux kernel to raise the bar?
Is it possible to implement CSO offload easily in FPGA?
I posted the exact results and measurement settings in my blog .
Thanks!
Meir Tseitlin