by FHuettig » Thu Sep 25, 2014 9:37 pm
Hi Andy,
Because the AXI-eLink interface logic is quite involved, and I don't expect that you want to give up control of the Epiphany from the Arm CPUs, I think the easiest way would be to use one of the unused AXI slave interfaces, either GP or HP, to route your read/write requests to the Epiphany interface. I expect that you can do this without taking any bandwidth away from non-Epiphany transactions inside the PS, the PS interconnect block should (I hope) be able to handle concurrent transactions between independent ports.
If you need the Epiphany to write to / read from your logic you'll have to use a master AXI port and assign it an address range that you then use on the Epiphany.
I do have it on my list to implement streaming interfaces to/from the FPGA fabric from/to the Epiphany, with either the Arm or Epiphany setting up a list of descriptors to determine how the data is distributed/gathered, but it will be a while before that happens.
-Fred
-- Fred -- Hardware Guy --