by piotr5 » Fri Jun 26, 2015 3:22 pm
thanks for the pointer. in it's clearly written that xilinx did already add what I'm calling 2-stage booting here: after reading data from sd you can issue a 2nd reset which preserves the registers in table 26-2 and from these registers you read how to configure PS before clearing the reset-thing. according to that table at least 16 bits are available for passing whatever configuration you wish. that's 64K of different configurations to choose from. not sure it's enough. now try to compress the whole FSBL into these 16 bits. still better than risking jtag and diminishing flash-rom...