Hello world,
Fisrt of all I tried to find solution by myself, but it seems that my basic knowledge in FPGAs isn't enough.
I have as project to use the parallella as a peripheral card, allowing me to use ethernet, SD and USB through PEC_FPGA (my 'master' board communicating through this element)
As I understand after reading some doc., it seems to me that the easier way to do this is to implement HW logic to convert PEC IO into AMBA/AXI structure. For this I should modify the .bit.bin file from my boot-SD card.
So my questions are:
Where can I find the basic code to generate my bitstream? (I create it from parallella-hw-master and planAhead? And so where are the last version of the file?)
If I have an 'independant coded' PEC converter bloc, does it affect the elink? (I wonder, because I would like to keep the Epiphany for further use)
Thank you for your attention and your answers!
Orfevre