Has anyone managed to get DMA transfers (either 1D or 2D) to/from the FPGA working well? In particular AXI streaming DMA - but I'll consider other working alternatives.
I have been playing around with AXI peripherals synthesised in the FPGA over the past few weeks. I have had success with both AXI4LITE and AXI4 via the memmap interface, and having the FPGA do ALU / pixel type operations, but no success yet with high performance memory transfers.
Ideally, I'd like to test DMA performance using a pre-existing kernel driver rather than diving in and writing my own straight away (I'm brushing up on my VHDL, specifically, at present).
I have had very little success with streaming DMA. I have a VHDL module synthesised to use this interface, but trying to interface with it under Linux from the ARM side is proving to be a problem. All the Xilinx provided examples seem to be based on a baremetal application. The most helpful I found was for the Zedboard, and relied on the . In particular, . While I have built this against the Parallella kernel, it triggers a kernel panic - I believe the particular driver it is trying to bind with (Xilinx AXI DMA) may be missing/different.
I haven't yet built the Xilinx kernel for the Parallella - but if you have, and have any hints, those also would be appreciated.
Or, if you know how to get DMA going (FPGA, not Epiphany) on the Parallella-ADI kernel, I'd like to hear from you. Getting it running on Xilinx is just a temporary measure, as long term, I want to be able to generate something (bitstream, devicetree if necessary) which anyone can use on their Parallella - so ideally something which works on the Parallella kernel (and default config would be a bonus here). But if I can get something working on Xilinx as a starting point, I can potentially port across the driver at a later date.