Parallella Community

I somehow have a hard time to understand how the FPGA on the Parallella works.
What I got so far is, that it has a certain number of programmable gates and some of them are used to connect some output pins, the hdmi(?) and the Epiphany(?) and the remaining gates are free to be used for custom programming.
So one can play around with the fpga without interfering with the standard setup?

Can anyone recommend a beginners guide or a tutorial of a hello-world program with VHDL (I guess that is what is used to program the beast)?

Best regards,

You have the wrong idea about what FPGAs are. Generally they are build with memory based reprogrammable logic that can be used to implement all kinds of digital circuits like counters, simple arithmetic cores, filters, communication controllers, memories and even microprocessors. You can design hardware projects inside FPGAs using hardware description languages (HDLs) like Verilog or VHDL, but it's completely different than programing in high level languages like ANSI C, or even Assembler. Therefore there is no such thing as "Hello world" program in VHDL/Verilog - it's completely different level of abstraction. You work with logic gates, not a microprocessor resources that are able to execute software.

Here's a tricky part - ZYNQ devices present on Parallella board are a hybrid of FPGA and ARM processors - they have a certain amount of reconfigurable logic that can be utilized with HDL designs and embedded ARM processors that can be programmed as usual (with ANSI C for example). So you can have a "Hello world" program for those processors.

The gist is, ARM processors on ZYNQ are used to run embedded Linux and communicate with Epiphany chip, and the reconfigurable logic is yours for implementing whatever you want.

There are plenty books for FPGA development, both in Verilog and VHDL (I use latter), although if you have such opportunity I would recommend taking a proper university course about it. As I stated before HDLs work on completely different level of abstraction than programming languages and they require proper understanding of underlying hardware. People with a lot of experience in programming in languages like C, when they start doing projects on FPGAs tend to do some ridiculously stupid things.

If you are interested in FPGA development, you could always have a skim through my FPGA intro course.

http://hamsterworks.co.nz/mediawiki/ind ... PGA_course

With > 72,000 hits it can't be that wrong.... Grab the PDF from GitHub using the link on the first page - the web site is a little bit old and I paid a couple of people with devboards to proofread the PDF version

However, the Zynq is a very advanced chip - its 'learning curve' is more like a brick wall. It would be well worth you money to get a low-end FPGA dev board to play with!

Actually, it really looks like a nice introductory course.

What I don't really understand is what you mean the Zynq is advanced.
The logic array has "only" 85k gates whereas the Papilio has 250k?
Or do you mean with all the peripherals and the ARM on the SoC it adds lots of complexity?

The Zynq is advanced because you need a lot of background knowledge to make it do anything useful. For example, to have the FPGA fabric talk to the ARM CPU you need to be able to design (or at least use) an AXI bus interface. With the HDMI interface connected via the FPGA fabric it is a bit like needing to hand-build a 32 bit PCI interface before you can use a video card. It is also 'advanced' in that the multiplier blocks in low-end FPGAs are now DSP blocks which can do a lot more, but require a lot more design effort to use efficiently.

It takes a long time to place and route designs on such a complex FPGA, it is not uncommon for a design to take 20 minutes or so to implement on my laptop, compared to a few minutes or so on an Spartan 3E. This makes it really slow turnaround if you are just learning and trying things out.

In some respects the Zynq 7020 is a relatively large FPGA for hobby use - compared to a basic Spartan 3E FPGA starter board, with 560KB RAM and 220 DSP blocks vs 48KB and 20 multipliers for a Spartan 3E-500. However, in equivalent gate count it is about 1.3 million ASIC gates, compared to the Spartan 3E-500's 0.5 million - but then equivalent gate counts is a meaningless metric . It also clocks a lot faster then older chips - designs running at 300MHz or so are possible.

The extra DSP and RAM blocks reflect the target market for the device - real-time DSP with the ARM supervising what is going on. You can implement complex low-latency filtering of 16-bit 250MHz signal with this sort of stuff...

Oh, and a FPGA dev board will have lots more switches and lights to play with!

I'm also going to throw in a note of support for hamster's FPGA course. I've just gotten through the first project (turning lights on and off with a switch). I'm a software guy with a little bit of experience with microcontrollers, and found the writing very accessible and easy to understand.

Ditto for support for hamster's course !

I've just bought myself ( Father's Day, ahem ) a NEXYS-3 to play with .... if I learn anything usefully new ( it's a Spartan 6 ) I'll mention it.

Cheers, Mike.