I have been using Parallella Embedded (Zynq 7020) for a couple of months and have recently acquired a Porcupine board but I have not used it yet. My main interest is FPGA development and finally, it's time to use the available GPIO. However, I have some questions and I wonder if you might help me:
- The Parallella Manual (http://www.parallella.org/docs/parallella_manual.pdf) says that the "PEC_FPGA includes 48 bidirectional signals that can be configured within the Zynq device to support a number of different signal standards, including LVCMOS and LVDS". However in the Porcupine board, I only see 24 pins connected to the PEC_FPGA. What is the relationship between these 24 pins and the aforementioned 48 IOs?
- Is it possible to use LVCMOS33 or only LVCMOS25? What about LVTTL?
- Table 7 in Parallella Manual (regarding pin assignments) is incomplete. What is the mapping between the Zynq pins and GPIOs?
- Porcupine also comes with a PMOD. To which Zynq pins are the PMOD IOs connected? Are they connected to the PL part of the Zynq?
Many thanks in advance
PS: The reason I want to use the Porcupine is to be able to debug my FPGA designs and to interface Parallella with other hardware such as (other) FPGAS and image sensors.
