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Parallella Community • View topic - error after make command to build a vivado project

error after make command to build a vivado project

Using Zynq Programmable Logic and Xilinx tools to create custom board configurations
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error after make command to build a vivado project

Postby parallella-project » Mon May 28, 2018 5:39 am

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Re: error after make command to build a vivado project

Postby Min » Tue May 29, 2018 5:15 pm

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Re: error after make command to build a vivado project

Postby parallella-project » Tue May 29, 2018 6:16 pm

Hi,
Could you just tell me step by step what have you done exactly?
I just want to create a new project by this repository to be able to code in Vivado (PL and PS and epiphany). I'm not very familiar with scripts or Linux for now! :roll:
I've tried a lot of method to build so far but there is no progress :|
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Re: error after make command to build a vivado project

Postby Min » Fri Jun 01, 2018 11:55 pm

I notice you use Vivado 2015.2.
/opt/Xilinx/Vivado/2015.2

Try to use Vivado 2015.4. I can build 7020_hdmi without any problem today.
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Re: error after make command to build a vivado project

Postby parallella-project » Sat Jun 02, 2018 8:15 am

Last edited by parallella-project on Mon Jun 04, 2018 10:16 am, edited 1 time in total.
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Re: error after make command to build a vivado project

Postby parallella-project » Sat Jun 02, 2018 8:19 am

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Re: error after make command to build a vivado project

Postby Min » Tue Jun 05, 2018 5:18 pm

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