This is not necessarily an error per se, wording and consistency really. Picky me

Take, say, page 102 ( of architecture reference ) describing the LDR(DISPLACEMENT) instruction :
address= RN +/- IMM<<( log2(
size/8)-1);
Now I've got the idea that one scales the displacement/offset as per the chosen data size ( BYTE, HALF, WORD, DOUBLE ), and that one appends either B/H/W/D as appropriate to the tail of the mnemonic ( hence LDRB/LDRH/LDRW/LDRD ).
However for that bit shift of the immediate operand to the left, the size parameter ( my red emphasis ) only makes sense if it represents the number of
bits of the operand thus :
address= RN +/- IMM<<( log2(
size/8));
Eg. page 52 gives <size> as being one of B,H,L,D but here we mean <size> is one of 8/16/32/64 .... have I got that right ??
[ Likewise for the other instructions using that construct ]
[ Also the example on page 102 mentions LDRS, and while we know that designates a "short" : would a short be a byte or a halfword ? ]
Cheers, Mike.
( edit ) My apologies if this has already been picked up, but I couldn't find that on searching ....